Flexible hardware programmable scalable parallel processor
US9535705B1 · kind B1 · utility
Inventor
Key dates
| Filing date | Aug 13, 2014 |
| Grant date | Jan 3, 2017 |
| Priority date | — |
| Expiry date | Jun 27, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a typical embodiment, a parallel processor is provided that includes:A plurality of parallel processing units that are interconnected to provide a flexible hardware programmable, scalable and re-configurable parallel processor that executes different functions in a parallel processor space domain instead of a processor (serial processor) time domain. Each parallel processing unit includes a flexible processing engine with its inputs and outputs connected to MDDP-RAM blocks. The MDDP-RAM blocks provide the processing engine with different channels' data and coefficients. The processing engine and the MDDP-RAM blocks are controlled by a system processor (or other control scheme hardware) via the parameter blocks to enable high hardware flexibility and software programmability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.