Parallel destaging with replicated cache pinning
US9535840B2 · kind B2 · utility
4Cited by
30References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2016 |
| Grant date | Jan 3, 2017 |
| Priority date | — |
| Expiry date | Feb 18, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, apparatus and computer program products implement embodiments of the present invention that include identifying non-destaged first data in a write cache. Upon detecting second data in a master read cache, the second data is pinned to the master and one or more backup read caches. Using the first data stored in the write cache and the second data stored in the master read cache, one or more parity values are calculated, and the first data and the one or more parity values are destaged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.