Gate driver circuit, gate driving method, gate-on-array circuit, display device, and electronic product
US9536476B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2014 |
| Grant date | Jan 3, 2017 |
| Priority date | — |
| Expiry date | Apr 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/043
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The gate driver circuit is connected to a row of pixel unit, each includes a pixel driving module and a light-emitting device connected to each other, the pixel driving module including a driving transistor, a driving module and a compensating module, the compensating module is connected to a first row scanning signal, and the driving module is connected to a second row scanning signal and a driving voltage. The gate driver circuit further includes a row pixel controlling unit configured to provide the first row scanning signal to the compensating module and provide the second row scanning signal and the driving voltage to the driving module, so as to control the compensating module to compensate for a threshold voltage of the driving transistor and control the driving module to drive the light-emitting device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.