Blind via edge castellation
US9538636B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2013 |
| Grant date | Jan 3, 2017 |
| Priority date | — |
| Expiry date | Dec 6, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10719
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus having a plurality of insulating layers, a plurality of conductive layers and a plating is disclosed. The conductive layers may be separated by the insulating layers. A first pattern in a first of the conductive layers generally extends to an edge castellation. A second pattern in a second of the conductive layers may also extends to the edge castellation. The plating may be disposed in the edge castellation and connect the first pattern to the second pattern. The plating in the castellation may extend at most between a subset of the conductive layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.