Enhanced sensitivity ion sensing devices
US9541521B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2015 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Oct 30, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01N27/4145
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A mechanism is provided for enhancing the sensitivity of an ion-sensitive semiconductor device by creating a second gate coupled to a sense plate that can improve the amount of charge brought to the ion-sensitive semiconductor device conductivity modulated region (e.g., a channel region of an ISFET). This is accomplished by utilizing a buried dielectric layer associated with the ion-sensitive semiconductor device conductivity modulated region as the second gate dielectric. The buried dielectric layer is coupled to the sense plate using an isolated well region as a conductor that is coupled to metal layers extending to the sense plate. Some embodiments further use the buried dielectric layer as the sole gate dielectric for the semiconductor device, thereby allowing the traditional gate dielectric region to be coupled to a protection diode. This protection diode then protects the gate dielectric from plasma induced damage and electrostatic discharge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.