System and method for error-minimizing voltage threshold selection
US9542258B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Oct 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of solid-state storage devices provided herein include a voltage threshold calculation mechanism to calculate an optimal voltage read threshold for minimizing read errors. The system may be configured to determine optimal reference voltage value(s) by interpolating a pair of reads at two different threshold levels to determine the point that generates the least number of errors. In some cases, the evaluation may be an approximation based on a Cumulative Distribution Function (CDF) of errors of a first type and a second type. In other cases, the evaluation may be a calculation of an optimal voltage threshold based on the CDF of the errors. In yet other cases, the evaluation may be based on the Probability Density Function (PDF) of the errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.