Data storage device and flash memory control method
US9542278B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2014 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Mar 27, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device and a flash memory control method with high efficiency are disclosed. The random access memory of the data storage device is allocated to provide a collection and update area for logical-to-physical address mapping tables that correspond to logical addresses recorded into the physical-to-logical address mapping table. When recording a logical address corresponding to a new logical-to-physical address mapping table that has not appeared in the collection and update area into the physical-to-logical address mapping table, the microcontroller of the data storage device is configured to collect the new logical-to-physical address mapping table into the collection and update area and perform an update of the new logical-to-physical address mapping table within the collection and update area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.