Memory architecture with local and global control circuitry
US9542997B2 · kind B2 · utility
1Cited by
45References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2015 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Oct 7, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a memory block. The memory block includes a local control circuit that is operable to control a memory operation of the memory block. The local control circuit includes a local sense amplifier. The system also includes a global memory control circuit separate from the memory block, and the global memory control circuit is operable to communicate with the local control circuit. The global memory control circuit includes a global data latch operable to receive a sensed data state from the local sense amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.