Semiconductor memory device and method of fabricating the same
US9543316B2 · kind B2 · utility
6Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2015 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Mar 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Inventive concepts provide semiconductor memory devices and methods of fabricating the same. A stack structure and vertical channel structures are provided on a substrate. The stack structure includes insulating layers and gate electrodes alternately and repeatedly stacked on the substrate. The vertical channel structures penetrate the stack structure. Conductive pads are disposed on the vertical channel structures. An etch stopper covers sidewalls of the conductive pads. Pad contacts are disposed on the conductive pads to be in contact with the conductive pads. The pad contacts are further in contact with the etch stopper.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.