Array substrate, display device and manufacturing method of the array substrate
US9543324B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 3, 2013 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Jun 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/451
Abstract
An array substrate, a display device and a manufacturing method of the array substrate. The array substrate includes: a base substrate (1) and a plurality of pixel units located on the base substrate (1), each of the pixel units including a thin film transistor unit. The thin film transistor unit includes: a gate electrode located on the base substrate (1), a gate insulating layer (3) located on the gate electrode, an active layer (4) located on the gate insulating layer (3) and opposed to the gate electrode in position, an ohmic layer (5) located on the active layer (4), a source electrode (6a) and a drain electrode (6b) that are located on the ohmic layer (5) and a resin passivation layer (8) that are located on the source electrode (6a) and the drain electrode (6b) and covers the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.