Display panel
US9543334B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2015 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Jun 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/123
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A display panel is provided. The display panel includes a substrate including a non-display region containing a thin film transistor, which includes a semiconductor layer; a first insulating layer; a first metal layer; a second insulating layer; a first and second via hole series disposed adjacent to the respective opposite sides of the first metal layer. The first via hole series includes a plurality of first via holes, and the second via hole series includes a plurality of second via holes. A second metal layer includes a first portion and a second portion. The minimum distance between an edge of the first portion and an edge of the first metal layer is a first distance, and the minimum distance between an edge of the second portion and another edge of the first metal layer is a second distance, and the second distance is greater than the first distance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.