Audible noise avoiding circuit and DC-DC boost converter having the same
US9543826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2015 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Nov 2, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An audible noise avoiding circuit and a DC-DC boost converter for a DC-DC boost converter are provided. The audible noise avoiding circuit comprises a timing controller and a linear regulator. The timing controller discharges a timing capacitor to a low voltage according to switching of the DC-DC boost converter. A sink output stage of the liner regulator is coupled to the output voltage node. When the voltage of the timing capacitor is higher than a threshold voltage, the compensation unit compensates the output of the operational amplifier for gradually turning on the sink output stage in order to gradually reduce the voltage of the output voltage node. A predetermined charging time interval is defined by the time interval of charging the timing capacitor from the low voltage to the threshold voltage, the reciprocal of the predetermined time interval is a frequency in the ultrasonic wave frequency range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.