Switching architecture with packet encapsulation
US9544080B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2014 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Jul 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/6489
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The invention includes, among other things, a system for passing TDM traffic through a packet switch. In one embodiment, the system includes a packet switch that has a plurality of data ports and is capable of routing FSDU packets between the plurality of data ports. A TDM encapsulation circuit process a TDM data flow that is incoming to the switch. A circuit demultiplexer processes the incoming data flow to buffer data associated with different TDM circuits into different buffer locations. A timer monitors the amount of time available to fill the FSDU, and when the time period reaches the frame boundary, an FSDU generator generates an FSDU that is filled with data associated with the TDM circuits. Header information is added for allowing the packet switch to route the generated FSDU to a port associated with the respective TDM circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.