Random number generating circuit
US9547475B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2013 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Sep 17, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/584
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a random number generating circuit includes first to N-th oscillating circuits (N is a natural number equal to 2 or greater), first to N-th latch circuits that latch outputs of the first to N-th oscillating circuits by a first clock having a first frequency, first to N-th exclusive OR circuits, (N+1)-th to (2×N)-th latch circuits that latch outputs of the first to N-th exclusive OR circuits by the first clock, an (N+1)-th exclusive OR circuit that outputs an exclusive OR of outputs of the (N+1)-th to (2×N)-th latch circuits, and an M-bit shift register that converts serial data output from the (N+1)-th exclusive OR circuit into M-bit parallel data (M is a natural number equal to 2 or greater) by a second clock having a second frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.