Multi-core processor system and control method
US9547576B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2014 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Aug 9, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-core processor system includes a multi-core processor that has plural core groups; and a storage device that stores a constraint on execution time for each application. A first identified core of the multi-core processor is configured to identify a constraint on execution time of a given application that is among the applications and for which an invocation instruction is received; determine whether the identified constraint meets a performance drop condition; assign the given application to a predetermined core of the multi-core processor, upon determining that the identified constraint meets the performance drop condition; and notify a second identified core of a core group among the core groups, of an assignment instruction for the given application, upon determining that the identified constraint does not meet the performance drop condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.