System and method of data storage in flash memory
US9547588B1 · kind B1 · utility
21Cited by
1References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 9, 2014 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Oct 11, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7211
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Flash memory is subject to a wear out failure mechanism which may depend on the number of times each cell of the memory is programmed and erased. The higher the programming voltage used, the more rapidly the cell degrades. A system and method for reducing the average programming voltage for data sets is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.