Adjustment method of signal level in semiconductor device and semiconductor device
US9548090B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2015 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Dec 30, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Characteristics of each transistor in a semiconductor device including a transistor of a memory cell are measured by an ASV monitoring circuit, a power supply voltage supplied to the semiconductor device is determined based on the measured characteristics of the transistor, a data read-out speed of the memory cell under the determined power supply voltage supplied is measured while changing a signal level of a word line by an SRAM word line monitoring circuit, the signal level of the word line is determined by comparing the measured data read-out speed of the memory cell and a specification range of the memory cell, and the signal level of the word line is appropriately set at the power supply voltage applied by the ASV.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.