Chip stack structure using conductive film bridge adhesive technology
US9553073B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2014 |
| Grant date | Jan 24, 2017 |
| Priority date | — |
| Expiry date | Apr 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip stack structure using conductive film bridge adhesive technology comprises a substrate, a first chip, at least one bridge element, a conductive film, and a second chip. The first chip is electrically connected to a first electrode of the substrate. The at least one bridge element has a first bridge surface and a second bridge surface at two ends, and the first bridge surface and the second bridge surface are electrically connected to the first chip and a second electrode of the substrate, respectively. The conductive film is electrically connected to the first bridge surface of the at least one bridge element. The second chip is stacked and electrically connected to the conductive film. Thus, the structure of the present invention not only facilitates the ease of stacking the chips but also increases the effectiveness of the chips heat dissipation and ability of withstanding electrical current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.