Shared ESD circuitry
US9553446B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2014 |
| Grant date | Jan 24, 2017 |
| Priority date | — |
| Expiry date | Jun 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit including ESD circuitry that is shared among more than one terminal segment of the integrated circuit to discharge current from an ESD event on any of the terminal segments. The shared ESD circuitry includes a clamp circuit that is coupled to power buses of each segment to discharge current from ESD events on each segment. The shared ESD circuitry includes a trigger circuit that is coupled to nodes coupled to terminals of each segment to detect an ESD event on each segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.