Self clocking comparator for a charge pump
US9553572B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 18, 2014 |
| Grant date | Jan 24, 2017 |
| Priority date | — |
| Expiry date | Mar 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/01
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A self clocking comparator for clocking a charge pump providing a high voltage output including multiple gain stages and a reset circuit. The gain stages are configured to assert the compare voltage at a first voltage level in a default state when the sense voltage is greater than the reference voltage, and to assert the compare voltage to a second voltage level in a reset state when the sense voltage falls below the reference voltage. The reset circuit resets, or otherwise forces, the gain stages back to the default state in response to the compare voltage transitioning to the second voltage level. The compare voltage oscillates while the sense voltage is less than the reference voltage at a frequency based on a magnitude of a difference between the sense voltage and the reference voltage up to a predetermined maximum frequency level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.