GOA circuit based on LTPS semiconductor TFT
US9553577B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 6, 2015 |
| Grant date | Jan 24, 2017 |
| Priority date | — |
| Expiry date | Apr 10, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a GOA circuit based on LTPS semiconductor TFT, comprising a plurality of GOA units which are cascade connected, and N is set to be a positive integer and an Nth GOA unit comprises a pull-up control part (100), a pull-up part (200), a first pull-down part (400) and a pull-down holding part (500); the pull-down holding part (500) utilizes a high/low voltage reverse design and comprises a first, a second and a third DC constant low voltage levels (VSS1, VSS2, VSS3) which are sequentially abated and a DC constant high voltage level (H), the influence of electrical property of the LTPS semiconductor TFT to the GOA driving circuit, and particularly the bad function due to the electric leakage issue can be solved; meanwhile, the existing issue that the second node voltage level the pull-down holding circuit part in the GOA circuit based on the LTPS semiconductor TFT cannot be at higher voltage level in the functioning period can be solved to effectively maintain the first node (Q(N)) and the output end (G(N)) at low voltage level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.