Delay locked loop and associated control method
US9553593B1 · kind B1 · utility
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20Claims
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Key dates
| Filing date | Dec 2, 2015 |
| Grant date | Jan 24, 2017 |
| Priority date | — |
| Expiry date | Dec 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00019
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A control method for a delay locked loop includes: delaying an input signal to generate an internal signal; delaying the internal signal to generate an output signal; and selectively providing a reference clock signal or the output signal as the input signal according to the output signal and the internal signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.