Apparatus and method for preventing stiction of MEMS devices encapsulated by active circuitry
US9556017B2 · kind B2 · utility
2Cited by
14References
20Claims
0Family size
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Key dates
| Filing date | Jun 25, 2013 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Jun 25, 2033 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/0118
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
One or more stopper features (e.g., bump structures) are formed in a standard ASIC wafer top passivation layer for preventing MEMS device stiction vertically in integrated devices having a MEMS device capped directly by an ASIC wafer. A TiN coating may be used on the stopper feature(s) for anti-stiction. An electrical potential may be applied to the TiN anti-stiction coating of one or more stopper features.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.