Method of wafer-level hermetic packaging with vertical feedthroughs
US9556020B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2013 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Sep 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48463
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer-level packaging method for MEMS structures that are desired to be encapsulated in a hermetic cavity and that need the transfer of at least a single or multiple electrical leads to the outside of the cavity without destroying the hermeticity of the cavity. Lead transfer is achieved using vertical feedthroughs that are patterned on the capping substrate within the same fabrication step to produce the encapsulating cavity. Furthermore, the structure of the vertical feedthroughs and via openings to reach these feedthroughs are arranged in such a way that conventional wirebonding would be sufficient to connect the vertical feedthroughs to the outer world, without a need for conductor-refill inside the via openings. The method is compatible with low-temperature thermocompression-based bonding/sealing processes using various sealing materials such as thin-film metals and alloys, and also with the silicon-glass anodic or silicon-silicon fusion bonding processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.