Patent · US Active

Digital signal processor and method for addressing a memory in a digital signal processor

US9557996B2 · kind B2 · utility

0Cited by

4References

14Claims

0Family size

Assignee

Mediatek Sweden AB · SE

Inventors

Anders Nilsson · Helsingborg, SE
Eric Tell · Säter, SE
Erik Alfredsson · Säter, SE

Key dates

Filing date	Nov 28, 2012
Grant date	Jan 31, 2017
Priority date	—
Expiry date	Apr 23, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06F15/8061
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In a digital signal processor comprising at least one vector execution unit and at least a first memory unit a third unit is arranged to provide addressing data in the form of an address vector to be used for addressing the first memory unit, said third unit being connectable to the first memory unit through the on-chip network, in such a way that data provided from the third unit can be used to control the reading from and/or the writing to the first memory unit. This enables fast reading from and writing to a memory unit of data in any desired order.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.