Connected component labeling in graphics processors
US9558560B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Mar 14, 2014 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Sep 20, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods may provide for obtaining data associated with an image and using a plurality of threads in a graphics processor to conduct a single instruction multiple data (SIMD) scan of the data. Additionally, systems and methods may provide for generating a plurality of connection tables corresponding to the plurality of threads based on the SIMD scan. In one example, a plurality of threads in the graphics processor are used to conduct a single phase merge of the plurality of connection tables onto a global connected components labeling (CCL) table for the image.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.