Method for regulating reading voltage of NAND flash memory device
US9558816B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2014 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Jun 27, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of adjusting read voltages for a NAND flash memory device includes an operation of reading first page data from a first page corresponding to a paired page of a second page, an operation of simultaneously changing the first test read voltage and the third test read voltage to read second page data from a second page, an operation of performing a bitwise operation on the first page data and the second page data an operation of counting a number of memory cells corresponding to a first threshold voltage state and a fourth threshold voltage state by using a result of the bitwise operation, and an operation of setting a first read voltage and a third read voltage as a voltage corresponding to a section in which a change in the number of memory cells is a lowest value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.