Nonvolatile semiconductor memory device
US9558837B2 · kind B2 · utility
9Cited by
9References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2015 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Sep 23, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a memory cell array, a sense amplifier, a register, a controller. The memory cell array includes a memory cell. The sense amplifier connects to the bit line. The register holds write data, and a write voltage. The controller outputs a busy signal. The controller causes the register to hold the write data and the write voltage upon receiving the first command, and resumes the write operation based on the write data and the write voltage held in the register upon receiving the resumption command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.