Multilayer substrate and method for manufacturing the same
US9558859B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2014 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Feb 18, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/1291
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides a slip layer substrate which can reduce the thermal residual stresses between components induced by their mismatch of thermal expansion, thus greatly improve the reliability of electronic packages. The slip layer substrate comprises: a base material; a first metallization layer formed on the base material; a first diffusion barrier layer formed on the first metallization layer; a slip layer formed on the first diffusion barrier layer; a second diffusion barrier layer formed on the slip layer; and a second metallization layer formed on the second diffusion barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.