Method for forming MOS device passivation layer and MOS device
US9559032B2 · kind B2 · utility
0Cited by
8References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2013 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Jul 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method of forming a passivation layer of a MOS device, and a MOS device. The method of forming a passivation layer of a MOS device includes: forming a substrate; forming a dielectric on the substrate; patterning the dielectric to expose a part of the substrate; forming a metal on the exposed part of the substrate, and the dielectric; forming a TEOS on the metal; forming a PSG on the TEOS; and forming a silicon nitrogen compound on the PSG. Therefore, the cracks problem of the passivation can be alleviated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.