Field effect transistors and methods of forming same
US9559209B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 15, 2015 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Jun 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6741
Abstract
Semiconductor devices and methods of forming the same are provided. A first source/drain layer is formed over a substrate. A channel layer is formed over the first source/drain layer. A second source/drain layer is formed over the channel layer. The first source/drain layer, the channel layer, and the second source/drain layer are patterned to form a fin-shaped structure. A gate stack is formed on a sidewall of the fin-shaped structure. The fin-shaped structure is patterned to expose a top surface of the first source/drain layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.