Patent · US Active

Clock and data recovery circuit with bidirectional frequency detection and electronic device using the same

US9559705B1 · kind B1 · utility

1Cited by
4References
13Claims
0Family size

Assignees

Inventors

Key dates

Filing dateNov 27, 2015
Grant dateJan 31, 2017
Priority date
Expiry dateNov 27, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L2207/06
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A clock and data recovery (CDR) circuit is provided. A phase detection circuit receives an input signal and a clock signal to output a first voltage signal. A first comparing circuit determines whether the first voltage signal is within a voltage range to output a first up signal and a first down signal. A counting circuit updates a counting value according to the input signal and the clock signal. A second comparing circuit determines whether the counting value is within a value range to output a second up signal and a second down signal. A selection circuit outputs a second voltage signal according to the first up signal, the first down signal, the second up signal, and the second down signal. A voltage controlled oscillator outputs the clock signal according to the first voltage signal and the second voltage signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.