Adaptive equalization processing circuit and adaptive equalization processing method
US9559876B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 23, 2014 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | May 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03745
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Provided is an adaptive equalization processing circuit with which an adaptive equalization process converges in a stable manner without reducing the transmission efficiency. This adaptive equalization processing circuit is characterized by being equipped with: a demodulation means that demodulates a received signal, and generates and outputs a training signal; an adaptive equalization processing means that uses a tap coefficient (generated using the received signal or the training signal) to perform an adaptive equalization process for removing waveform distortion in the received signal, and then outputs an equalization output signal; and a selection means that selects the training signal when the adaptive equalization processing means is in a non-convergent state, and inputs the training signal to the adaptive equalization processing means.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.