Patent · US Active

Instruction and logic for flush-on-fail operation

US9563557B2 · kind B2 · utility

6Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 23, 2014
Grant dateFeb 7, 2017
Priority date
Expiry dateJul 27, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/608
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A processor includes a memory management unit and a front end including a decoder. The decoder includes logic to receive a flush-on-commit (FoC) instruction to flush dirty data from a volatile cache to a persistent memory upon commitment of a store associated with the FoC instruction. The memory management unit includes logic to, based upon a flush-on-fail (FoF) mode, skip execution of the flush-on-commit instruction and to flush the dirty data from the volatile cache upon a subsequent FoF operation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.