Computing architecture for operating on sequential data
US9563599B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2013 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Mar 28, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8046
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data stream processing unit (DPU) and method for use are provided. A DPU includes a number of processing elements arranged in a sequence, and each datum in the data stream visits each processing element in sequence. Each processing element has a memory circuit, data and metadata input and output channels, and a computing circuit. The metadata input represents a partial computational state that is associated with each datum as it passes through the DPU. The computing circuit for each processing element operates on the data and metadata inputs as a function of its position in the sequence, producing an altered partial computational state that accompanies the datum. Each computing circuit may be modeled, for example, as a finite state machine, and the collection of processing elements cooperate to perform the computation. The computing circuits may be collectively programmed to perform any desired computation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.