Patent · US Active

Low power radiation hardened memory cell

US9564208B2 · kind B2 · utility

0Cited by
3References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2015
Grant dateFeb 7, 2017
Priority date
Expiry dateSep 30, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C29/789
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The invention concerns a memory cell having: first and second cross-coupled gated inverters (102, 104), each including first and second inputs (IN1, IN2) and an output (OUT) and being adapted to couple its output to a first logic level only when the first and second inputs both receive the inverse of the first logic level; a first cut-off circuit (106) coupling the second input (IN2) of the first gated inverter (102) to the first input (IN1) of the first gated inverter (102); and a second cut-off circuit (108) coupling the second input (IN2) of the second gated inverter (104) to the first input (IN1) of the second gated inverter (104).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.