Multi-stacked structures of semiconductor packages
US9564417B2 · kind B2 · utility
2Cited by
2References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 9, 2015 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Sep 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06589
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-stacked structure of semiconductor packages includes a plurality of substrates stacked in a vertical direction, semiconductor packages mounted on each substrate of the plurality of the substrates, a heat release column extending commonly through the plurality of the substrates and overlapping at least one semiconductor package serving as a heat generation source among the semiconductor packages in the vertical direction, and a heat dissipation part thermally connected to one end of the heat release column.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.