Thin-film transistor and its manufacturing method, array substrate and display device
US9564460B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | May 16, 2016 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | May 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method of a thin film transistor comprises: sequentially forming a pattern of gate, a gate insulation layer film, an active layer film and an ohmic contact layer film, a first etching resist module within a channel region to be formed, and a source and drain metallic layer film on a substrate; forming a pattern comprising the source and drain by wet etching process by shielding the active layer film and the ohmic contact layer film positioned within the channel region to be formed, by use of the first etching resist module; and forming a pattern comprising the ohmic contact layer and the active layer by dry etching process. A thin film transistor, an array substrate comprising the thin film transistor and a display device comprising the array substrate are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.