Three-dimensional semiconductor memory devices and methods of fabricating the same
US9564499B2 · kind B2 · utility
3Cited by
3References
20Claims
0Family size
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Key dates
| Filing date | Aug 21, 2013 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Aug 21, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.