Digital compensation for a non-linear analog receiver
US9564876B2 · kind B2 · utility
24Cited by
3References
35Claims
0Family size
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Key dates
| Filing date | Sep 22, 2014 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Apr 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0261
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Aspects and embodiments are directed to non-linear systems including a digital compensator structure, a method of digital compensation, and methods for designing digital compensator structures for analog receivers. A digital compensator is configured to substantially reduce the one or more nonlinear distortion components in the sampled digital output signal from the analog receiver to provide an output signal achieving a receiver linearity requirement for the combination of the analog receiver and a digital compensator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.