Gate driving circuit and display device having the same
US9564889B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2014 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Dec 28, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit includes plural-stage output circuits, an Nth stage output circuit of the plural-stage output circuits includes an Nth stage shift register and a mixer. The Nth stage shift register is configured to output an Nth pulse signal. The mixer is coupled to the Nth stage shift register and an (N+M)th stage shift register, for respectively outputting a first clock signal and a predetermined pulse signal during different periods according to the Nth pulse signal and an (N+M)th pulse signal of the (N+M)th stage shift register. Wherein pulse widths or phases of the first clock signal and the predetermined pulse signal are different, and N and M are positive integers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.