Capacitance phase interpolation circuit and method thereof, and multi-phase generator applying the same
US9564906B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2014 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Nov 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0995
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A capacitance phase interpolation circuit including a first capacitance phase interpolation unit and a second capacitance phase interpolation unit is disclosed. The first capacitance phase interpolation unit includes a first capacitance group, wherein a plurality of capacitors in the first capacitance group are in a ring coupling, and the first capacitance phase interpolation unit receives a plurality of reference clock signals. The second capacitance phase interpolation unit is coupled to the first capacitance phase interpolation unit and includes a second capacitance group, wherein a plurality of capacitors in the second capacitance group are in a ring coupling, and each of the output clock signals is obtained via the first capacitance phase interpolation unit and the second capacitance phase interpolation unit by performing phase interpolation on all the reference clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.