Patent · US Active

Optimization of data locks for improved write lock performance and CPU cache usage in multi core architectures

US9569265B2 · kind B2 · utility

1Cited by
0References
15Claims
0Family size

Assignee

Inventor

Key dates

Filing dateOct 7, 2014
Grant dateFeb 14, 2017
Priority date
Expiry dateDec 12, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/62
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Data access optimization features the innovative use of a writer-present flag when acquiring read-locks and write-locks. Setting a writer-present flag indicates that a writer desires to modify a particular data. This serves as an indicator to readers and writers waiting to acquire read-locks or write-locks not to acquire a lock, but rather to continue waiting (i.e., spinning) until the write-present flag is cleared. As opposed to conventional techniques in which readers and writers are not locked out until the writer acquires the write-lock, the writer-present flag locks out other readers and writers once a writer begins waiting for a write-lock (that is, sets a writer-present flag). This feature allows a write-lock method to acquire a write-lock without having to contend with waiting readers and writers trying to obtain read-locks and write-locks, such as when using conventional spinlock implementations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.