Architectural failure analysis
US9569345B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2013 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Jun 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3692
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Localizing errors by: (i) running the testcase on a software model version of a processor to yield first testcase-run results in the form of a first set of values respectively stored in the set of data storage locations; (ii) creating a resource dependency information set based on the instructions of the testcase; (iii) running the testcase on a hardware version of the processor to yield second testcase-run results in the form of a second set of values respectively stored in the set of data storage locations; (iv) determining a set of miscompare data storage location(s), including at least a first miscompare data storage location, by comparing the first set of values and the second set of values; and (v) creating an initial dynamic slice of the data flow.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.