Dynamic capacitance balancing
US9570157B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2016 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Jan 29, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various implementations described herein are directed to a device for dynamic capacitance balancing. The device may include a sense amplifier configured to receive complimentary data signals from complimentary bitlines and provide first and second sensed data signals based on received complimentary data signals. The second sensed data signal may be a compliment of the first sensed data signal. The device may include a balance coupler configured to receive the second sensed data signal from the sense amplifier and provide a modified second sensed data signal having capacitance similar to the first sensed data signal. The device may include a latch configured to receive the first sensed data signal from the sense amplifier, receive the modified second sensed data signal from the balance coupler, and provide a latched data signal based on the first and modified second sensed data signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.