Semiconductor storage device and memory system
US9570173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2016 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Mar 7, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor storage device has a memory string including a memory cell, a bit line electrically connected to one end of the memory string, and a sense amplifier electrically connected to the bit line. The sense amplifier has a first transistor, one end of which is connected to a first node on an electric current path of the bit line, and another end of which is electrically connected to a second node, a second transistor electrically connected between the second node and a sense node, and a third transistor, a gate of which is connected to the first node, and the third transistor being electrically connected between the second node and a third node whose voltage can be adjusted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.