Semiconductor die, integrated circuits and driver circuits, and methods of maufacturing the same
US9570437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2014 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | May 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die is disclosed comprising a lateral semiconductor device on an upper major surface of a substrate, the integrated circuit comprising a silicon layer over the substrate, a recess in the silicon layer, a layer of LOCOS silicon oxide within the recess and having a grown upper surface which is coplanar with the surface of an un-recessed portion of the silicon layer, wherein the silicon layer beneath the recess has a non-uniform lateral doping profile, and is comprised in a drift region of the lateral semiconductor device. A method of making such a die is also disclosed, as is an integrated circuit and a driver circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.