Method and device for high k metal gate transistors

US9570611B2 · kind B2 · utility

Assignee

• Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventors

• Yong Li · Chaole, CN
• Xiao WANG · Beijing, CN

Key dates

• Filing date: Jan 20, 2016
• Grant date: Feb 14, 2017
• Expiry date: Jan 20, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

A method of manufacturing a semiconductor device includes providing a semiconductor substrate. The semiconductor substrate includes a dummy gate structure formed thereon and an offset spacer formed on a sidewall of the dummy gate structure. The method further includes removing the dummy gate structure to form a gate trench, forming a high-k dielectric layer on the bottom and the sidewall of the gate trench, and forming a cover layer over the high-k dielectric layer. The cover layer has a thickness that is greater at the corners of the bottom of the gate trench than in the middle region of the bottom of the gate trench.