Patent · US Active

Voltage regulator with power stage sleep modes

US9570979B2 · kind B2 · utility

2Cited by
1References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 17, 2014
Grant dateFeb 14, 2017
Priority date
Expiry dateApr 23, 2034

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02B70/10
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

A power stage of a voltage regulator includes a first switch for connecting a load to a supply voltage in a first switching state of the power stage, a second switch for connecting the load to ground in a second switching state of the power stage and driver circuitry for setting the power stage in the first switching state, the second switching state or a non-switching state in which both switches are off responsive to a switching control signal received by the power stage. A power management unit moves the power stage from a nominal power mode to a first low power mode if the power stage is in the non-switching state for a predetermined time period.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.