DC voltage generation circuit and pulse generation circuit thereof
US9570982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2015 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | May 31, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/162
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A pulse generation circuit, for outputting a pulse signal at an output terminal, comprises a PMOS, an NMOS and a logic circuit. The PMOS has a source coupled to a first reference voltage level, a drain coupled to the output terminal, and a gate coupled to a first gate control signal. The NMOS has a source coupled to a second reference voltage level, a drain coupled to the output terminal, and a gate coupled to a second gate control signal. The logic circuit generates the first gate control signal according to a control signal and a first logic signal, relating to the second gate control signal and a delay signal of the second gate control signal, and generates the second gate control signal according to the control signal and a second logic signal, relating to the first gate control signal and a delay signal of the first control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.